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Arm Cortex-M4 Bare-Metal Development With Stm32F411

ntahmar

Member

Sclc.jpg


Published 3/2023
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 15.66 GB | Duration: 27h 29m


Learn how to write Bare-metal code on the STM32F411 to bring up and configure the microcontroller for various tasks

What you'll learn
Understand the ARM Cortex-M4 Core on the STM32F411 Discovery Board, Datasheets and Reference Manuals
Learn Embedded C for 32 bit controllers. Different methods for Register and Memory Access, Bitwise operations, Inline Assembly
Learn the Interrupt Subsystem for both Non Floating and Floating Point modes. Set up the Exception Vector Table, Set up the Systick and EXTI interrupts
Learn ELF object file format, Linker Symbol Relocation and Resolution, Linker variables, VMA and LMA. Write Linker Script files.
Understand the Clock subsystem, learn about PLL operation, bare-metal configuration of clock tree and PLL without configuration tool
Learn about the I/O subsystem, circuitry of the I/O pins. Learn different pin modes like open drain, push pull, alternate functions and internal pull ups
Understand the startup process, setup the interrupt vector table.
Learn how to write the reset handler, set up the data, stack and .bss sections

Requirements
Basic microcontroller knowledge is necessary, at least knowledge of any 8 bit controller, better still if you are aware of a 16 bit architecture
Intermediate knowledge of C programming and basic pointer and data structure concepts are necessary. Knowledge of embedded C not necessary at all as necessary embedded C will be tackled in the course itself

Description
A deep dive into the ARM Cortex M4 architecture with the STM32F411 Discovery board with the GNU ARM Cross Toolchain. Understanding the programmers model, IDE (Integrated Development Environment). Detailed discussions, In depth study of Datasheets and Reference Manuals, Demos and Case Studies on Memory access and its pitfalls (Different methods like Macros with offsets and Structures), Compilation and Linking process, Input/Output Subsystem, Interrupts (Both non-floating and floating point) and Clock Tree Configuration with in depth discussion on PLL circuitry and operation. Slideshows, Code Walkthroughs, Whiteboard and Debug Sessions are an integral part of the course. There are certain topics in Embedded Systems especially for advanced microcontrollers which pose unique challenges The process of manipulating the memory directly on a microcontroller either through macros or through structure pointersPointers for embedded systems. Though looking similar to their workstation counterparts, there are subtle differences which could mess up the application if not carefully handledIn embedded firmware development since application efficiency, determinism, power efficiency, memory size, writing efficient C programs and keeping track of the assembly code compiled from C/C++ are of paramount importance.The Interrupt Handling Process is complicated and the stack frames created, vary between implementations like Floating point and Non Floating point Stacking and Unstacking. Interrupt preemption is a complicated feature and needs to be handled with care. The process of Linking and Make is grossly misunderstood as well. The topics of object files, relocation, symbol resolution pose an unique challenge and consolidated information on these in one place in a book of on the internet are scarce. Object File Formats are a grey area as well which causes much distress when the process of linking is to be understood. The different tables in the object file like the Symbol Table, Relocation Table are difficult to comprehend without proper guidance. Input/Output pin configuration also pose challenges if the electricals and circuitry of the pins are not understood well. There are multiple configuration in which each pin of a microcontroller can operate like open drain, push-pull, high impedance etc. The Clock Tree for a high end microcontroller is quite complex as well. Multiple clock sources feeding clocks to different subsystems make the initial learning curve quite steep. Over and above that the high frequency clocks are driven by PLLs which are complex circuits themselves and need a good deal of understanding when configuring them. The processor startup could be tricky especially the part where the memory is set up after every reset. The understanding of .text, .data, .bss sections and setting them up properly during boot up is tricky.In this course I strive to address all of the challenges above with theory, diagrams, animation and code. There are plenty of demos to explain difficult to understand concepts. I have cleared all concepts through extensive debugging sessions on the IDE while inspecting the different subsystems of the controller in real time. I have taken the following steps to address the challengesApproached memory access and operations in different ways like Macros and Structures. I have built up the concepts gradually until I arrived at the final form of the expressions. I have shown examples of misaligned accessing of memory through structures and their mitigation. Bitwise operations have been dealt with in real time on the debugger.For understanding the Linking process, I created code examples and first manually compile each source file and look into the ELF object files, the symbol tables and relocation tables along with the disassembly is explained. Once the files were compiled into a single object file by the linker, the symbol resolution and code and symbol relocation are clearly explained by looking into the final object file. The linker script file is explained in detail with diagrams of before and after initialisation diagrams of memory.An extensive debug session of the startup process explaining how the processor sets up memory, in real time. The reset handler is explained and demonstrated. The process of initialising the .data section in the RAM and setting up the .bss section and stack is demonstrated. The Make process is explained using multiple makefiles each with slightly increasing complexity in each until the final 'cryptic' makefile is written and fully understood. The dependency graph is explained and many possible error scenarios are discussed on make so as to explain how make tackles Makefiles. It's a decently exhaustive treatment of Make which will facilitate developers to write makefles for deeply embedded systems. Interrupt Handling is demonstrated in detail along with theory. Demonstration and Theory of Interrupt Handling, preemption for both non-floating and floating point configuration. Concepts like lazy stacking explained explained and demonstrated on the debugger. The Clock Tree is explained in detail. PLL calculations for setting frequency. Theory of PLL operation with explanation of different PLL sub systems with illustrations and timing diagrams. Demonstration of initialisation of all registers in the clock tree subsystem on the debugger along with explanation. I/O circuitry and then configuring the I/O pins. All pin modes explained like push-pull, open drain, analog and alternate functions.

Overview
Section 1: CortexM4_Basics

Lecture 1 A few words on embedded systems and ARM Cortex M4 introduction

Lecture 2 Cortex-M4 Features

Lecture 3 Processor Architecture, Bus Matrix and Memory Map

Lecture 4 STM32F411xC/xE Datasheet Walkthrough, Cortex-M4 Registers and Memory Map

Lecture 5 Program Execution and Pipeline Details

Lecture 6 STM32F411 Discovery Board Datasheet Walkthrough

Lecture 7 Toolchain installation on Windows

Lecture 8 Toolchain installation on Linux

Lecture 9 Connect the Discovery board for the first time

Lecture 10 Getting started with the STM32 CUBEIDE for the first time

Lecture 11 Embedded C Code for Download

Lecture 12 Embedded C, Part 1 - Address Pointer Basics and Memory Access Macros

Lecture 13 Embedded C, Part 2 - Demo on Address Pointers with Macros

Lecture 14 Embedded C, Part 3 - Accessing Memory through structures and Demo

Lecture 15 Embedded C, Part 4 - Bitwise Operators and Pointer Arithmetic

Lecture 16 Embedded C, Part 5 - Demo on Bitwise Operators and Pointer Arithmetic

Lecture 17 Embedded C, Part 6 - Inline Assembly

Lecture 18 Embedded C, Part 7 - Demo on Inline Assembly

Lecture 19 Embedded C, Part 8 - Header file creation heuristics and CMSIS memory map header

Section 2: Linker and Make Mechanism

Lecture 20 Necessary code for Linker and Make

Lecture 21 Introduction to Linker and Make

Lecture 22 ELF file format

Lecture 23 ELF Object Code

Lecture 24 Linker Relocation

Lecture 25 Symbol Table and Symbol and Segment Relocation

Lecture 26 Linker Control Scripts, VMA and LMA

Lecture 27 Make Basics and Makefiles

Lecture 28 Putting it all together

Lecture 29 Demo on Make

Lecture 30 Startup and Reset handler on the STM32F11

Lecture 31 Cortex-M4 Startup Demo on the STM32F11

Section 3: General-purpose I/Os (GPIO)

Lecture 32 Necessary Code for GPIO

Lecture 33 I/O Circuitry and Electricals

Lecture 34 I/O Pin Configuration and Registers Overview

Lecture 35 I/O Pin Configuration Demo

Section 4: Interrupt and Exception Handling on Cortex-M4

Lecture 36 Necessary Code on Exception Handling

Lecture 37 Exception Handling Basics

Lecture 38 Basics of Interrupt Behaviour and Introduction to Exception Vector Table

Lecture 39 The SCB Exception Control and NVIC Registers Walkthrough

Lecture 40 Interrupt Priority Management

Lecture 41 Advanced Interrupt Behaviour

Lecture 42 Interrupt Entry and Exit Sequence

Lecture 43 Systick Interrupt Theory

Lecture 44 SysTick Demo Part 1

Lecture 45 Systick Demo Part 2

Lecture 46 Interrupt stacking for Non-Floating point mode

Lecture 47 Demo on Interrupt Unstacking

Lecture 48 Demo on Stacking for Floating Point Enabled Mode

Lecture 49 External Interrupts Theory

Lecture 50 Demo on External Interrupts Part 1

Lecture 51 Demo on External Interrupts Part 2

Lecture 52 Demo on Interrupt Preemption

Lecture 53 Reset Handler Theory

Section 5: STM32F411 Clock Tree Configuration and PLL setting

Lecture 54 Necessary Code on Clock Tree Configuration

Lecture 55 Introduction to the Clock Tree, PLL Basics and Register Walkthrough

Lecture 56 PLL Internal Circuitry and Operation

Lecture 57 Clock Tree Walkthrough and PLL Configuration

Lecture 58 Demo on Clock Tree Configuration and PLL Configuration

Computer Science, Electrical and Electronics Undergraduates and Fresh Graduates looking for a career in Embedded Systems,Working professionals looking to upgrade to a ARM Cortex-M4 STM32F4 controller from 8 bit or 16 bit counterparts,Hobbyists and Enthusiasts interested in Bare-metal programming on the STM32F4 Microcontroller

Code:
https://1dl.net/39gvltvkv43v/ARM_CortexM4_Baremetal_Development_with_STM32F411.part01.rar
https://1dl.net/5j2ak0jis5ri/ARM_CortexM4_Baremetal_Development_with_STM32F411.part02.rar
https://1dl.net/z4oiitfml8aa/ARM_CortexM4_Baremetal_Development_with_STM32F411.part03.rar
https://1dl.net/qefl5l31gm17/ARM_CortexM4_Baremetal_Development_with_STM32F411.part04.rar
https://1dl.net/ksiskmn7n3xy/ARM_CortexM4_Baremetal_Development_with_STM32F411.part05.rar
https://1dl.net/lns77x2tg0a6/ARM_CortexM4_Baremetal_Development_with_STM32F411.part06.rar
https://1dl.net/8z3cbwf2mqrv/ARM_CortexM4_Baremetal_Development_with_STM32F411.part07.rar
https://1dl.net/vfm9mdkjp5wb/ARM_CortexM4_Baremetal_Development_with_STM32F411.part08.rar
https://1dl.net/1mu7tc2h7ps6/ARM_CortexM4_Baremetal_Development_with_STM32F411.part09.rar

Code:
https://nitroflare.com/view/77B66272A077442/ARM_CortexM4_Baremetal_Development_with_STM32F411.part01.rar
https://nitroflare.com/view/42A65614DDC5254/ARM_CortexM4_Baremetal_Development_with_STM32F411.part02.rar
https://nitroflare.com/view/C26161A4F3B72E5/ARM_CortexM4_Baremetal_Development_with_STM32F411.part03.rar
https://nitroflare.com/view/429AA9FE0FD2A86/ARM_CortexM4_Baremetal_Development_with_STM32F411.part04.rar
https://nitroflare.com/view/21ED583DEE746B2/ARM_CortexM4_Baremetal_Development_with_STM32F411.part05.rar
https://nitroflare.com/view/294FF22568DB17B/ARM_CortexM4_Baremetal_Development_with_STM32F411.part06.rar
https://nitroflare.com/view/7486B0304DC0864/ARM_CortexM4_Baremetal_Development_with_STM32F411.part07.rar
https://nitroflare.com/view/61384B5EA9EB3DC/ARM_CortexM4_Baremetal_Development_with_STM32F411.part08.rar
https://nitroflare.com/view/66C9BBEDCE00668/ARM_CortexM4_Baremetal_Development_with_STM32F411.part09.rar

Code:
https://rapidgator.net/file/b050b88dd42d00f9c268e9e5110fcdf8/ARM_CortexM4_Baremetal_Development_with_STM32F411.part01.rar.html
https://rapidgator.net/file/164edfd18cc243445cf0f049b0f32211/ARM_CortexM4_Baremetal_Development_with_STM32F411.part02.rar.html
https://rapidgator.net/file/10dbc32cf7714425ddef0d41457d6b7b/ARM_CortexM4_Baremetal_Development_with_STM32F411.part03.rar.html
https://rapidgator.net/file/83fdf74cb4d90a4eeb511b240668f382/ARM_CortexM4_Baremetal_Development_with_STM32F411.part04.rar.html
https://rapidgator.net/file/40b8755c67680d54c586610646b8de8b/ARM_CortexM4_Baremetal_Development_with_STM32F411.part05.rar.html
https://rapidgator.net/file/e751e953c37a5cb8bde14201629f614d/ARM_CortexM4_Baremetal_Development_with_STM32F411.part06.rar.html
https://rapidgator.net/file/84e51cdefdf001f36939efb7a848da95/ARM_CortexM4_Baremetal_Development_with_STM32F411.part07.rar.html
https://rapidgator.net/file/0619a37c8039fa102c77ee4862d94472/ARM_CortexM4_Baremetal_Development_with_STM32F411.part08.rar.html
https://rapidgator.net/file/687dc10da4ca250988f743dd8d2eca99/ARM_CortexM4_Baremetal_Development_with_STM32F411.part09.rar.html

 

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